Technology Transfer
FPGA Implement of a vision based lane departure warning system
In this system, we present a Field-Programmable Gate Array (FPGA) implementation of a real-time vision-based lane departure warning system. By taking video frames, the lane marks and departure of the vehicle will be detected in time. This idea has been implemented in Xilinx Spartan6 FPGA. The frame rate is 30 frames per sec (fps).
‧Frame rate : 30FPS
‧Hardware : Xilinx Spartan 6 FPGA
‧Operation Frequency : 27MHz
‧Video Interface : NTSC or PAL
‧Operation Temperature : -40°C ~85°C
This technology is not only used by LDWS ,but also used by BDS or AVM. This implementation is also designed for SOC(System On Chip).
This Technology can help IC design houses implement their own vehicle safety system and male they keep developing vehicle safety chip.